Algorithms for Synthesis and Optimization of Integrated Circuits (2V, 1U; 4 LP ECTS)

This course will be given in English.

Course number in SS 2017: L.079.05816

Monday, 09:00-10:45, in room O1.258: Lecture

Monday, 11:00-11:45, in room O1.258: Exercises

Course start date: April 24, 2017.

The course provides the most remarkable features of digital synthesis, and explains the details of transforming hardware description languages into circuit descriptions. Besides, the major techniques for logic optimization are discussed, and then the efficient use of current design tools are exercised in practical sessions.

• Hardware modeling languages
• High-level synthesis and optimization methods (i.e., scheduling and binding)
• Logic Representation and optimization of two-level logic functions (exact and heuristic algorithms)
• Data structures for logic synthesis (Binary decision diagrams)
• Representation and optimization of multiple-level logic networks (Algebraic methods, controllability and observability computations, and timing verification)
• Modeling and optimization of sequential logic networks (Retiming)
• Libraries and binding
• Satisfiability

Principle logic design

Giovanni De Micheli, Synthesis and Optimization of Digital Circuits, McGraw-Hill Higher Education, 1994.