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Reconfigurable Computing (6 CP, 2V+3Ü)

This course will be given in English.

Subject and Goal

The course Reconfigurable Computing introduces into the field of computing with reprogrammable hardware structures. Computing systems built from reprogrammable hardware structures do not rely on a fixed hardware, but adapt their hardware architecture to the application under execution. The field was formed in the early 1990s when Field-programmable Gate Arrays (FPGAs) became commercially available that were powerful enough to be used for computing. Today, FPGA-based high-performance systems have outperformed state-of-the-art computers for many problems including database search, genomic sequence scanning, and cryptography. In embedded systems, FPGAs accelerate system functions, reduce system cost and power consumption, and enable hardware-on-demand functionality. The course covers the following list of topics:

  • Introduction to reconfigurable computing
  • Evolution of programmable hardware devices
  • Architectures of FPGAs
  • Computer-aided design for FPGAs
  • Application domains for FPGAs
  • System design and programming reconfigurable computers

Dates and Times, Materials

The course includes lectures, paper & pencil exercises and lab assignments. Teaching hours are on Wednesday, 11:15-12:45 in room D1.312, starting with October 10, 2018. Lab hours will be announced later in the course.

The course materials will be provided via the following PANDA course.


There are no formal prerequisites for taking this course. However, since the course covers both architectures of micro/nano-electronic devices and algorithms for design automation, and the lab includes programming of hardware and software, we expect that students have taken Bachelor-level courses in digital design, algorithms, and programming. 



Prof. Dr. Marco Platzner

Computer Engineering

Marco Platzner
+49 5251 60-5250
+49 5251 60-4250

The University for the Information Society