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Team

Dr. Hassan Ghasemzadeh Mohammadi

Contact
Publications
Dr. Hassan Ghasemzadeh Mohammadi

Computer Engineering

PostDoc

Phone:
+49 5251 60-4344
Fax:
+49 5251 60-4250
Office:
O3.134
Office hours:

by appointment

Web:
Web(external):
Visitor:
Pohlweg 51
33098 Paderborn


Open list in Research Information System

2020

A Hybrid Synthesis Methodology for Approximate Circuits

M. Awais, H. Ghasemzadeh Mohammadi, M. Platzner, in: Proceedings of the 30th ACM Great Lakes Symposium on VLSI (GLSVLSI) 2020, ACM, 2020, pp. 1-6

Automated synthesis of approximate circuits via functional approximations is of prominent importance to provide efficiency in energy, runtime, and chip area required to execute an application. Approximate circuits are usually obtained either through analytical approximation methods leveraging approximate transformations such as bit-width scaling or via iterative search-based optimization methods when a library of approximate components, e.g., approximate adders and multipliers, is available. For the latter, exploring the extremely large design space is challenging in terms of both computations and quality of results. While the combination of both methods can create more room for further approximations, the \textit{Design Space Exploration}~(DSE) becomes a crucial issue. In this paper, we present such a hybrid synthesis methodology that applies a low-cost analytical method followed by parallel stochastic search-based optimization. We address the DSE challenge through efficient pruning of the design space and skipping unnecessary expensive testing and/or verification steps. The experimental results reveal up to 10.57x area savings in comparison with both purely analytical or search-based approaches.


2019

CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation

L.M. Witschen, T. Wiersema, H. Ghasemzadeh Mohammadi, M. Awais, M. Platzner, Microelectronics Reliability (2019), 99, pp. 277-290

Existing approaches and tools for the generation of approximate circuits often lack generality and are restricted to certain circuit types, approximation techniques, and quality assurance methods. Moreover, only few tools are publicly available. This hinders the development and evaluation of new techniques for approximating circuits and their comparison to previous approaches. In this paper, we first analyze and classify related approaches and then present CIRCA, our flexible framework for search-based approximate circuit generation. CIRCA is developed with a focus on modularity and extensibility. We present the architecture of CIRCA with its clear separation into stages and functional blocks, report on the current prototype, and show initial experiments.


Jump Search: A Fast Technique for the Synthesis of Approximate Circuits

L.M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, M. Platzner, in: Proceedings of the 2019 on Great Lakes Symposium on VLSI - GLSVLSI '19, ACM, 2019

State-of-the-art frameworks for generating approximate circuits automatically explore the search space in an iterative process - often greedily. Synthesis and verification processes are invoked in each iteration to evaluate the found solutions and to guide the search algorithm. As a result, a large number of approximate circuits is subjected to analysis - leading to long runtimes - but only a few approximate circuits might form an acceptable solution. In this paper, we present our Jump Search (JS) method which seeks to reduce the runtime of an approximation process by reducing the number of expensive synthesis and verification steps. To reduce the runtime, JS computes impact factors for each approximation candidate in the circuit to create a selection of approximate circuits without invoking synthesis or verification processes. We denote the selection as path from which JS determines the final solution. In our experimental results, JS achieved speed-ups of up to 57x while area savings remain comparable to the reference search method, Simulated Annealing.


2018

CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation

L.M. Witschen, T. Wiersema, H. Ghasemzadeh Mohammadi, M. Awais, M. Platzner, in: Third Workshop on Approximate Computing (AxC 2018), 2018

Existing approaches and tools for the generation of approximate circuits often lack generality and are restricted to certain circuit types, approximation techniques, and quality assurance methods. Moreover, only few tools are publicly available. This hinders the development and evaluation of new techniques for approximating circuits and their comparison to previous approaches. In this paper, we first analyze and classify related approaches and then present CIRCA, our flexible framework for search-based approximate circuit generation. CIRCA is developed with a focus on modularity and extensibility. We present the architecture of CIRCA with its clear separation into stages and functional blocks, report on the current prototype, and show initial experiments.


An MCTS-based Framework for Synthesis of Approximate Circuits

M. Awais, H. Ghasemzadeh Mohammadi, M. Platzner, in: 26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2018, pp. 219-224

Approximate computing has become a very popular design strategy that exploits error resilient computations to achieve higher performance and energy efficiency. Automated synthesis of approximate circuits is performed via functional approximation, in which various parts of the target circuit are extensively examined with a library of approximate components/transformations to trade off the functional accuracy and computational budget (i.e., power). However, as the number of possible approximate transformations increases, traditional search techniques suffer from a combinatorial explosion due to the large branching factor. In this work, we present a comprehensive framework for automated synthesis of approximate circuits from either structural or behavioral descriptions. We adapt the Monte Carlo Tree Search (MCTS), as a stochastic search technique, to deal with the large design space exploration, which enables a broader range of potential possible approximations through lightweight random simulations. The proposed framework is able to recognize the design Pareto set even with low computational budgets. Experimental results highlight the capabilities of the proposed synthesis framework by resulting in up to 61.69% energy saving while maintaining the predefined quality constraints.


2016

A Fault-Tolerant Ripple-Carry Adder with Controllable-Polarity Transistors

H. Ghasemzadeh Mohammadi, P. Gaillardon, J. Zhang, G.D. Micheli, E. Sanchez, M.S. Reorda, ACM Journal on Emerging Technologies in Computing Systems (2016), pp. 1-13

DOI


Efficient Statistical Parameter Selection for Nonlinear Modeling of Process/Performance Variation

H. Ghasemzadeh Mohammadi, P. Gaillardon, G. De Micheli, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2016), PP(99), pp. 1-1

DOI


2015

From Defect Analysis to Gate-Level Fault Modeling of Controllable-Polarity Silicon Nanowires

H. Ghasemzadeh Mohammadi, P. Gaillardon, G. De Micheli, IEEE Transactions on Nanotechnology (2015), 14(6), pp. 1117-1126

DOI


On the design of a fault tolerant ripple-carry adder with controllable-polarity transistors

H. Ghasemzadeh Mohammadi, P. Gaillardon, J. Zhang, G. De Micheli, E. Sanchez, M.S. Reorda, in: 2015 IEEE Computer Society Annual Symposium on VLSI, IEEE, 2015, pp. 491-496

DOI


Fault modeling in controllable polarity silicon nanowire circuits

H. Ghasemzadeh Mohammadi, P. Gaillardon, G. De Micheli, in: Proceedings of the 2015 Design, Automation & Test in Europe Conference \& Exhibition, EDA Consortium, 2015, pp. 453-458

DOI


2014

Fast process variation analysis in nano-scaled technologies using column-wise sparse parameter selection

H. Ghasemzadeh Mohammadi, P. Gaillardon, M. Yazdani, G. De Micheli, in: 2014 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), IEEE, 2014, pp. 163-168

DOI


2013

A fast TCAD-based methodology for Variation analysis of emerging nano-devices

H. Ghasemzadeh Mohammadi, P. Gaillardon, M. Yazdani, G. De Micheli, in: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS), IEEE, 2013, pp. 83-88

DOI


Vertically-stacked silicon nanowire transistors with controllable polarity: A robustness study

P. Gaillardon, H. Ghasemzadeh Mohammadi, G. De Micheli, in: 2013 14th Latin American Test Workshop-LATW, IEEE, 2013, pp. 1-6

DOI


2010

Sub-threshold charge recovery circuits

M. Khatir, H. Ghasemzadeh Mohammadi, A. Ejlali, in: Computer Design (ICCD), 2010 IEEE International Conference on, IEEE, 2010, pp. 138-144

DOI


2009

Signature Self Checking (SSC): A Low-Cost Reliable Control Logic for Pipelined Microprocessors

H. Ghasemzadeh Mohammadi, S.G. Miremadi, A. Ejlali, in: Dependable Computing (PRDC), 2009 IEEE Pacific Rim International Symposium on, IEEE, 2009, pp. 252-255

DOI


2008

A cost-effective error detection and roll-back recovery technique for embedded microprocessor control logic

H. Ghasemzadeh Mohammadi, H. Tabkhi, S.G. Miremadi, A. Ejlali, in: 2008 International Conference on Microelectronics, IEEE, 2008, pp. 444-447

DOI


Open list in Research Information System

Lectures

2017

  • Lecture: Algorithms for Synthesis and Optimization of Integrated Circuits, Master, Paderborn University

Projects

  • [Link to projects]

Publications


Open list in Research Information System

Conferences

A Hybrid Synthesis Methodology for Approximate Circuits

M. Awais, H. Ghasemzadeh Mohammadi, M. Platzner, in: Proceedings of the 30th ACM Great Lakes Symposium on VLSI (GLSVLSI) 2020, ACM, 2020, pp. 1-6

Automated synthesis of approximate circuits via functional approximations is of prominent importance to provide efficiency in energy, runtime, and chip area required to execute an application. Approximate circuits are usually obtained either through analytical approximation methods leveraging approximate transformations such as bit-width scaling or via iterative search-based optimization methods when a library of approximate components, e.g., approximate adders and multipliers, is available. For the latter, exploring the extremely large design space is challenging in terms of both computations and quality of results. While the combination of both methods can create more room for further approximations, the \textit{Design Space Exploration}~(DSE) becomes a crucial issue. In this paper, we present such a hybrid synthesis methodology that applies a low-cost analytical method followed by parallel stochastic search-based optimization. We address the DSE challenge through efficient pruning of the design space and skipping unnecessary expensive testing and/or verification steps. The experimental results reveal up to 10.57x area savings in comparison with both purely analytical or search-based approaches.

@inproceedings{Awais_Ghasemzadeh Mohammadi_Platzner, title={A Hybrid Synthesis Methodology for Approximate Circuits}, booktitle={Proceedings of the 30th ACM Great Lakes Symposium on VLSI (GLSVLSI) 2020}, publisher={ACM}, author={Awais, Muhammad and Ghasemzadeh Mohammadi, Hassan and Platzner, Marco}, pages={1–6} }


Jump Search: A Fast Technique for the Synthesis of Approximate Circuits

L.M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, M. Platzner, in: Proceedings of the 2019 on Great Lakes Symposium on VLSI - GLSVLSI '19, ACM, 2019

State-of-the-art frameworks for generating approximate circuits automatically explore the search space in an iterative process - often greedily. Synthesis and verification processes are invoked in each iteration to evaluate the found solutions and to guide the search algorithm. As a result, a large number of approximate circuits is subjected to analysis - leading to long runtimes - but only a few approximate circuits might form an acceptable solution. In this paper, we present our Jump Search (JS) method which seeks to reduce the runtime of an approximation process by reducing the number of expensive synthesis and verification steps. To reduce the runtime, JS computes impact factors for each approximation candidate in the circuit to create a selection of approximate circuits without invoking synthesis or verification processes. We denote the selection as path from which JS determines the final solution. In our experimental results, JS achieved speed-ups of up to 57x while area savings remain comparable to the reference search method, Simulated Annealing.

@inproceedings{Witschen_Ghasemzadeh Mohammadi_Artmann_Platzner_2019, place={New York, NY, USA}, title={Jump Search: A Fast Technique for the Synthesis of Approximate Circuits}, DOI={10.1145/3299874.3317998}, booktitle={Proceedings of the 2019 on Great Lakes Symposium on VLSI  - GLSVLSI ’19}, publisher={ACM}, author={Witschen, Linus Matthias and Ghasemzadeh Mohammadi, Hassan and Artmann, Matthias and Platzner, Marco}, year={2019} }


An MCTS-based Framework for Synthesis of Approximate Circuits

M. Awais, H. Ghasemzadeh Mohammadi, M. Platzner, in: 26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2018, pp. 219-224

Approximate computing has become a very popular design strategy that exploits error resilient computations to achieve higher performance and energy efficiency. Automated synthesis of approximate circuits is performed via functional approximation, in which various parts of the target circuit are extensively examined with a library of approximate components/transformations to trade off the functional accuracy and computational budget (i.e., power). However, as the number of possible approximate transformations increases, traditional search techniques suffer from a combinatorial explosion due to the large branching factor. In this work, we present a comprehensive framework for automated synthesis of approximate circuits from either structural or behavioral descriptions. We adapt the Monte Carlo Tree Search (MCTS), as a stochastic search technique, to deal with the large design space exploration, which enables a broader range of potential possible approximations through lightweight random simulations. The proposed framework is able to recognize the design Pareto set even with low computational budgets. Experimental results highlight the capabilities of the proposed synthesis framework by resulting in up to 61.69% energy saving while maintaining the predefined quality constraints.

@inproceedings{Awais_Ghasemzadeh Mohammadi_Platzner_2018, title={An MCTS-based Framework for Synthesis of Approximate Circuits}, DOI={10.1109/VLSI-SoC.2018.8645026}, booktitle={26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)}, author={Awais, Muhammad and Ghasemzadeh Mohammadi, Hassan and Platzner, Marco}, year={2018}, pages={219–224} }


Fault modeling in controllable polarity silicon nanowire circuits

H. Ghasemzadeh Mohammadi, P. Gaillardon, G. De Micheli, in: Proceedings of the 2015 Design, Automation & Test in Europe Conference \& Exhibition, EDA Consortium, 2015, pp. 453-458

@inproceedings{Ghasemzadeh Mohammadi_Gaillardon_De Micheli_2015, title={Fault modeling in controllable polarity silicon nanowire circuits}, DOI={10.7873/DATE.2015.0428}, booktitle={Proceedings of the 2015 Design, Automation & Test in Europe Conference \& Exhibition}, publisher={EDA Consortium}, author={Ghasemzadeh Mohammadi, Hassan and Gaillardon, Pierre-Emmanuel and De Micheli, Giovanni}, year={2015}, pages={453–458} }


On the design of a fault tolerant ripple-carry adder with controllable-polarity transistors

H. Ghasemzadeh Mohammadi, P. Gaillardon, J. Zhang, G. De Micheli, E. Sanchez, M.S. Reorda, in: 2015 IEEE Computer Society Annual Symposium on VLSI, IEEE, 2015, pp. 491-496

@inproceedings{Ghasemzadeh Mohammadi_Gaillardon_Zhang_De Micheli_Sanchez_Reorda_2015, title={On the design of a fault tolerant ripple-carry adder with controllable-polarity transistors}, DOI={10.1109/ISVLSI.2015.13}, booktitle={2015 IEEE Computer Society Annual Symposium on VLSI}, publisher={IEEE}, author={Ghasemzadeh Mohammadi, Hassan and Gaillardon, Pierre-Emmanuel and Zhang, Jian and De Micheli, Giovanni and Sanchez, Eduardo and Reorda, Matteo Sonza}, year={2015}, pages={491–496} }


Fast process variation analysis in nano-scaled technologies using column-wise sparse parameter selection

H. Ghasemzadeh Mohammadi, P. Gaillardon, M. Yazdani, G. De Micheli, in: 2014 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), IEEE, 2014, pp. 163-168

@inproceedings{Ghasemzadeh Mohammadi_Gaillardon_Yazdani_De Micheli_2014, title={Fast process variation analysis in nano-scaled technologies using column-wise sparse parameter selection}, DOI={10.1109/NANOARCH.2014.6880479}, booktitle={2014 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH)}, publisher={IEEE}, author={Ghasemzadeh Mohammadi, Hassan and Gaillardon, Pierre-Emmanuel and Yazdani, Majid and De Micheli, Giovanni}, year={2014}, pages={163–168} }


Vertically-stacked silicon nanowire transistors with controllable polarity: A robustness study

P. Gaillardon, H. Ghasemzadeh Mohammadi, G. De Micheli, in: 2013 14th Latin American Test Workshop-LATW, IEEE, 2013, pp. 1-6

@inproceedings{Gaillardon_Ghasemzadeh Mohammadi_De Micheli_2013, title={Vertically-stacked silicon nanowire transistors with controllable polarity: A robustness study}, DOI={10.1109/LATW.2013.6562673}, booktitle={2013 14th Latin American Test Workshop-LATW}, publisher={IEEE}, author={Gaillardon, Pierre-Emmanuel and Ghasemzadeh Mohammadi, Hassan and De Micheli, Giovanni}, year={2013}, pages={1–6} }


A fast TCAD-based methodology for Variation analysis of emerging nano-devices

H. Ghasemzadeh Mohammadi, P. Gaillardon, M. Yazdani, G. De Micheli, in: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS), IEEE, 2013, pp. 83-88

@inproceedings{Ghasemzadeh Mohammadi_Gaillardon_Yazdani_De Micheli_2013, title={A fast TCAD-based methodology for Variation analysis of emerging nano-devices}, DOI={10.1109/DFT.2013.6653587}, booktitle={2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)}, publisher={IEEE}, author={Ghasemzadeh Mohammadi, Hassan and Gaillardon, Pierre-Emmanuel and Yazdani, Majid and De Micheli, Giovanni}, year={2013}, pages={83–88} }


Sub-threshold charge recovery circuits

M. Khatir, H. Ghasemzadeh Mohammadi, A. Ejlali, in: Computer Design (ICCD), 2010 IEEE International Conference on, IEEE, 2010, pp. 138-144

@inproceedings{Khatir_Ghasemzadeh Mohammadi_Ejlali_2010, title={Sub-threshold charge recovery circuits}, DOI={10.1109/ICCD.2010.5647815}, booktitle={Computer Design (ICCD), 2010 IEEE International Conference on}, publisher={IEEE}, author={Khatir, Mehrdad and Ghasemzadeh Mohammadi, Hassan and Ejlali, Alireza}, year={2010}, pages={138–144} }


Signature Self Checking (SSC): A Low-Cost Reliable Control Logic for Pipelined Microprocessors

H. Ghasemzadeh Mohammadi, S.G. Miremadi, A. Ejlali, in: Dependable Computing (PRDC), 2009 IEEE Pacific Rim International Symposium on, IEEE, 2009, pp. 252-255

@inproceedings{Ghasemzadeh Mohammadi_Miremadi_Ejlali_2009, title={Signature Self Checking (SSC): A Low-Cost Reliable Control Logic for Pipelined Microprocessors}, DOI={10.1109/PRDC.2009.69}, booktitle={Dependable Computing (PRDC), 2009 IEEE Pacific Rim International Symposium on}, publisher={IEEE}, author={Ghasemzadeh Mohammadi, Hassan and Miremadi, Seyed Ghassem and Ejlali, Alireza}, year={2009}, pages={252–255} }


A cost-effective error detection and roll-back recovery technique for embedded microprocessor control logic

H. Ghasemzadeh Mohammadi, H. Tabkhi, S.G. Miremadi, A. Ejlali, in: 2008 International Conference on Microelectronics, IEEE, 2008, pp. 444-447

@inproceedings{Ghasemzadeh Mohammadi_Tabkhi_Miremadi_Ejlali_2008, title={A cost-effective error detection and roll-back recovery technique for embedded microprocessor control logic}, DOI={10.1109/ICM.2008.5393497}, booktitle={2008 International Conference on Microelectronics}, publisher={IEEE}, author={Ghasemzadeh Mohammadi, Hassan and Tabkhi, Hamed and Miremadi, Seyed Ghassem and Ejlali, Alireza}, year={2008}, pages={444–447} }


Journal Articles

CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation

L.M. Witschen, T. Wiersema, H. Ghasemzadeh Mohammadi, M. Awais, M. Platzner, Microelectronics Reliability (2019), 99, pp. 277-290

Existing approaches and tools for the generation of approximate circuits often lack generality and are restricted to certain circuit types, approximation techniques, and quality assurance methods. Moreover, only few tools are publicly available. This hinders the development and evaluation of new techniques for approximating circuits and their comparison to previous approaches. In this paper, we first analyze and classify related approaches and then present CIRCA, our flexible framework for search-based approximate circuit generation. CIRCA is developed with a focus on modularity and extensibility. We present the architecture of CIRCA with its clear separation into stages and functional blocks, report on the current prototype, and show initial experiments.

@article{Witschen_Wiersema_Ghasemzadeh Mohammadi_Awais_Platzner_2019, title={CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation}, volume={99}, DOI={10.1016/j.microrel.2019.04.003}, journal={Microelectronics Reliability}, publisher={Elsevier}, author={Witschen, Linus Matthias and Wiersema, Tobias and Ghasemzadeh Mohammadi, Hassan and Awais, Muhammad and Platzner, Marco}, year={2019}, pages={277–290} }


Efficient Statistical Parameter Selection for Nonlinear Modeling of Process/Performance Variation

H. Ghasemzadeh Mohammadi, P. Gaillardon, G. De Micheli, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2016), PP(99), pp. 1-1

@article{Ghasemzadeh Mohammadi_Gaillardon_De Micheli_2016, title={Efficient Statistical Parameter Selection for Nonlinear Modeling of Process/Performance Variation}, volume={PP}, DOI={10.1109/TCAD.2016.2547908}, number={99}, journal={IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems}, publisher={IEEE}, author={Ghasemzadeh Mohammadi, Hassan and Gaillardon, Pierre-Emmanuel and De Micheli, Giovanni}, year={2016}, pages={1–1} }


A Fault-Tolerant Ripple-Carry Adder with Controllable-Polarity Transistors

H. Ghasemzadeh Mohammadi, P. Gaillardon, J. Zhang, G.D. Micheli, E. Sanchez, M.S. Reorda, ACM Journal on Emerging Technologies in Computing Systems (2016), pp. 1-13

@article{Ghasemzadeh Mohammadi_Gaillardon_Zhang_Micheli_Sanchez_Reorda_2016, title={A Fault-Tolerant Ripple-Carry Adder with Controllable-Polarity Transistors}, DOI={10.1145/2988234}, journal={ACM Journal on Emerging Technologies in Computing Systems}, author={Ghasemzadeh Mohammadi, Hassan and Gaillardon, Pierre-Emmanuel and Zhang, Jian and Micheli, Giovanni De and Sanchez, Ernesto and Reorda, Matteo Sonza}, year={2016}, pages={1–13} }


From Defect Analysis to Gate-Level Fault Modeling of Controllable-Polarity Silicon Nanowires

H. Ghasemzadeh Mohammadi, P. Gaillardon, G. De Micheli, IEEE Transactions on Nanotechnology (2015), 14(6), pp. 1117-1126

@article{Ghasemzadeh Mohammadi_Gaillardon_De Micheli_2015, title={From Defect Analysis to Gate-Level Fault Modeling of Controllable-Polarity Silicon Nanowires}, volume={14}, DOI={10.1109/TNANO.2015.2482359}, number={6}, journal={IEEE Transactions on Nanotechnology}, publisher={IEEE}, author={Ghasemzadeh Mohammadi, Hassan and Gaillardon, Pierre-Emmanuel and De Micheli, Giovanni}, year={2015}, pages={1117–1126} }


Preprint

CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation

L.M. Witschen, T. Wiersema, H. Ghasemzadeh Mohammadi, M. Awais, M. Platzner, in: Third Workshop on Approximate Computing (AxC 2018), 2018

Existing approaches and tools for the generation of approximate circuits often lack generality and are restricted to certain circuit types, approximation techniques, and quality assurance methods. Moreover, only few tools are publicly available. This hinders the development and evaluation of new techniques for approximating circuits and their comparison to previous approaches. In this paper, we first analyze and classify related approaches and then present CIRCA, our flexible framework for search-based approximate circuit generation. CIRCA is developed with a focus on modularity and extensibility. We present the architecture of CIRCA with its clear separation into stages and functional blocks, report on the current prototype, and show initial experiments.

@article{Witschen_Wiersema_Ghasemzadeh Mohammadi_Awais_Platzner, title={CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation}, journal={Third Workshop on Approximate Computing (AxC 2018)}, author={Witschen, Linus Matthias and Wiersema, Tobias and Ghasemzadeh Mohammadi, Hassan and Awais, Muhammad and Platzner, Marco} }


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