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Books and Chapters

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A. Agne, M. Platzner, C. Plessl, M. Happe, E. Lübbers, in: FPGAs for Software Programmers, Springer International Publishing, 2016, pp. 227-244


Self-aware Compute Nodes

A. Agne, M. Happe, A. Lösch, C. Plessl, M. Platzner, in: Self-aware Computing Systems, Springer International Publishing, 2016, pp. 145-165

Many modern compute nodes are heterogeneous multi-cores that integrate several CPU cores with fixed function or reconfigurable hardware cores. Such systems need to adapt task scheduling and mapping to optimise for performance and energy under varying workloads and, increasingly important, for thermal and fault management and are thus relevant targets for self-aware computing. In this chapter, we take up the generic reference architecture for designing self-aware and self-expressive computing systems and refine it for heterogeneous multi-cores. We present ReconOS, an architecture, programming model and execution environment for heterogeneous multi-cores, and show how the components of the reference architecture can be implemented on top of ReconOS. In particular, the unique feature of dynamic partial reconfiguration supports self-expression through starting and terminating reconfigurable hardware cores. We detail a case study that runs two applications on an architecture with one CPU and 12 reconfigurable hardware cores and present self-expression strategies for adapting under performance, temperature and even conflicting constraints. The case study demonstrates that the reference architecture as a model for self-aware computing is highly useful as it allows us to structure and simplify the design process, which will be essential for designing complex future compute nodes. Furthermore, ReconOS is used as a base technology for flexible protocol stacks in Chapter 10, an approach for self-aware computing at the networking level.


Verschiebungen an der Grenze zwischen Hardware und Software

M. Platzner, C. Plessl, in: Logiken strukturbildender Prozesse: Automatismen, Wilhelm Fink, 2014, pp. 123-144


Hardware Virtualization on Dynamically Reconfigurable Embedded Processors

C. Plessl, M. Platzner, in: Reconfigurable Embedded Control Systems: Applications for Flexibility and Agility, IGI Global, 2011



Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA)

T.P. Plaks, D. Andrews, R. DeMara, H. Lam, J. Lee, C. Plessl, G. Stitt, CSREA Press, 2010

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