Marco Platzner is Professor for Computer Engineering at Paderborn University. Previously, he held research positions at the Computer Engineering and Networks Lab at ETH Zurich, Switzerland, the Computer Systems Lab at Stanford University, USA, the GMD - Research Center for Information Technology (now Fraunhofer IAIS) in Sankt Augustin, Germany, and the Graz University of Technology, Austria. Marco Platzner holds diploma and PhD degrees in Telematics (Graz University of Technology, 1991 and 1996), and a "Habilitation" degree for the area hardware-software codesign (ETH Zurich, 2002).
His research interests include reconfigurable computing, hardware-software codesign, and parallel architectures. He currently leads three projects within the Collaborative Research Center (SFB) 901 "On-The-Fly Computing", for which he also serves as deputy speaker. He was coordinator of the EU FP7 FET project EPiCS and contributed to the priority programs SPP 1500 "Dependable Embedded Systems", SPP 1148 "Reconfigurable Computing Systems", and SPP 1183 "Organic Computing" of the German Research Foundation.
He is a senior member of the IEEE, a member of the ACM, serves on the program committees of several international conferences (eg. FPL, FPT, DATE, DAC), acts regularly as reviewer for scientific journals (eg. IEEE Transactions on Computers, IEEE Transactions on VLSI, ACM Transactions on Embedded Computing Systems), and is an associate editor of the ACM Transactions on Reconfigurable Technology and Systems, the International Journal of Reconfigurable Computing, the EURASIP Journal on Embedded Systems, the Springer Journal on Design Automation of Embedded Systems and the IET Journal on Computers and Digital Techniques. He also serves as a reviewer for several research funding agencies (European Commission, German Research Foundation, German Ministry for Economics and Technology, Dutch Technology Foundation, French Agency for Research Funding, Belgian Research Funding and Innovation Stimulation Agency, Swiss National Science Foundation, Austrian Science Foundation and the Israel Science Foundation).
Marco Platzner's work on the ReconOS reconfigurable hardware operating system was recognized by the Hall of Fame section of the ACM SIGDA Technical Committee on FPGAs and Reconfigurable Computing for the 2020 class of inductees. Further, he received a Significant Paper Award from 25 Years of FPL (2015), Best Paper Awards at the ARC International Symposium on Applied Reconfigurable Computing (2018), the IEEE International Conference on Reconfigurable Computing and FPGAs (2015), the International Conference Advances in Computer Games (2015), the Computers and Games Conference (2013), the International Conference on Evolvable Systems (2010), a HiPEAC Publication Award (2009), two Best Paper Awards at the NASA/ESA Conference on Adaptive Hardware and Systems (2008, 2007), and the Weierstraß Prize for excellent teaching from the Faculty for Computer Science, Electrical Engineering and Mathematics of the University of Paderborn (2008).
Marco Platzner is currently Dean of Research of the Faculty for Computer Science, Electrical Engineering and Mathematics at Paderborn University and member on the boards of the Paderborn Center for Parallel Computing, the Paderborn Institute of Advanced Studies, and the German Computer Science Faculty Association. Previously, he was a faculty member of the International Graduate School Dynamic Intelligent Systems of Paderborn University and of the Advanced Learning and Research Institute (ALaRI) at Universita' della Svizzera Italiana (USI), in Lugano. He also served on the board of the Advanced System Engineering Center of Paderborn University and was Head of the Computer Science Department, and Deputy Dean of the Faculty for Computer Science, Electrical Engineering and Mathematics at Paderborn University.
Veröffentlichungen (seit 2004)
Post-configuration Activation of Hardware Trojans in FPGAs
Q.A. Ahmed, T. Wiersema, M. Platzner, Journal of Hardware and Systems Security (2024).
DeepApprox: Rapid Deep Learning based Design Space Exploration of Approximate Circuits via Check-pointing
M. Awais, H. Ghasemzadeh Mohammadi, M. Platzner, in: To Apear in IEEE ISVLSI 2024, 2024.
FINN-T: Compiling Custom Dataflow Accelerators for Quantized Transformers
C. Berganski, F. Jentzsch, M. Platzner, M. Kuhmichel, H. Giefers, in: 2024.
AutonomROS: A ReconROS-based Autonomous Driving Unit
C. Lienen, M. Brede, D. Karger, K. Koch, D. Logan, J. Mazur, A.P. Nowosad, A. Schnelle, M. Waizy, M. Platzner, in: 2023 Seventh IEEE International Conference on Robotic Computing (IRC), IEEE, 2023.
On Guaranteeing Schedulability of Periodic Real-time Hardware Tasks under ReconOS64
L. Clausing, Z. Guetattfi, P. Kaufmann, C. Lienen, M. Platzner, in: Proceedings of the 19th International Symposium on Applied Reconfigurable Computing (ARC), 2023.
Mapping and Optimizing Communication in ROS 2-based Applications on Configurable System-on-Chip Platforms
C. Lienen, A.P. Nowosad, M. Platzner, in: Proceedings of the 2023 9th International Conference on Robotics and Artificial Intelligence (ICRAI), n.d.
fpgaDDS: An Intra-FPGA Data Distribution Service for ROS 2 Robotics Applications
C. Lienen, S.H. Middeke, M. Platzner, in: Proceedings of the 2023 IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS), 2023.
Verifying Software and Reconfigurable Hardware Services
H. Wehrheim, M. Platzner, E. Bodden, P. Schubert, F. Pauck, M.-C. Jakobs, in: C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, H. Wehrheim (Eds.), On-The-Fly Computing -- Individualized IT-Services in Dynamic Markets, Heinz Nixdorf Institut, Universität Paderborn, Paderborn, 2023, pp. 125–144.
Compute Centers I: Heterogeneous Execution Environments
T. Hansmeier, T. Kenter, M. Meyer, H. Riebler, M. Platzner, C. Plessl, in: C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, H. Wehrheim (Eds.), On-The-Fly Computing -- Individualized IT-Services in Dynamic Markets, Heinz Nixdorf Institut, Universität Paderborn, Paderborn, 2023, pp. 165–182.
Flexible Industrial Analytics on Reconfigurable Systems-On-Chip
A. Boschmann, L. Clausing, F. Jentzsch, H. Ghasemzadeh Mohammadi, M. Platzner, in: C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, H. Wehrheim (Eds.), On-The-Fly Computing -- Individualized IT-Services in Dynamic Markets, Heinz Nixdorf Institut, Universität Paderborn, Paderborn, 2023, pp. 225–236.
On-The-Fly Computing -- Individualized IT-services in dynamic markets
C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, H. Wehrheim, On-The-Fly Computing -- Individualized IT-Services in Dynamic Markets, Heinz Nixdorf Institut, Universität Paderborn, Paderborn, 2023.
MAAS: Hiding Trojans in Approximate Circuits
Q.A. Ahmed, M. Awais, M. Platzner, in: The 24th International Symposium on Quality Electronic Design (ISQED’23), San Francisco, Califorina USA, 2023.
Search Space Characterization for Approximate Logic Synthesis
L.M. Witschen, T. Wiersema, L.D. Reuter, M. Platzner, in: 2022 59th ACM/IEEE Design Automation Conference (DAC), n.d.
MUSCAT: MUS-based Circuit Approximation Technique
L.M. Witschen, T. Wiersema, M. Artmann, M. Platzner, in: Design, Automation and Test in Europe (DATE), n.d.
Integrating Safety Guarantees into the Learning Classifier System XCS
T. Hansmeier, M. Platzner, in: Applications of Evolutionary Computation, EvoApplications 2022, Proceedings, Springer International Publishing, 2022, pp. 386–401.
ReconOS64: A Hardware Operating System for Modern Platform FPGAs with 64-Bit Support
L. Clausing, M. Platzner, in: 2022 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), IEEE, 2022, pp. 120–127.
XCS on Embedded Systems: An Analysis of Execution Profiles and Accelerated Classifier Deletion
T. Hansmeier, M. Brede, M. Platzner, in: GECCO ’22: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Association for Computing Machinery (ACM), New York, NY, United States, 2022, pp. 2071–2079.
ReconROS Executor: Event-Driven Programming of FPGA-accelerated ROS 2 Applications
C. Lienen, M. Platzner, (2022).
Task Mapping for Hardware-Accelerated Robotics Applications using ReconROS
C. Lienen, M. Platzner, in: n.d.
Event-Driven Programming of FPGA-accelerated ROS 2 Robotics Applications
C. Lienen, M. Platzner, in: 2022 25th Euromicro Conference on Digital System Design (DSD), n.d.
On the Detection and Circumvention of Bitstream-Level Trojans in FPGAs
Q.A. Ahmed, M. Platzner, in: IEEE Computer Society Annual Symposium on VLSI (ISVLSI,2022), Pafos, Cyprus, 2022.
RadioML Meets FINN: Enabling Future RF Applications With FPGA Streaming Architectures
F. Jentzsch, Y. Umuroglu, A. Pappalardo, M. Blott, M. Platzner, IEEE Micro 42 (2022) 125–133.
Design of Distributed Reconfigurable Robotics Systems with ReconROS
C. Lienen, M. Platzner, ACM Transactions on Reconfigurable Technology and Systems (2021) 1–20.
LDAX: A Learning-based Fast Design Space Exploration Framework for Approximate Circuit Synthesis
M. Awais, H. Ghasemzadeh Mohammadi, M. Platzner, in: Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI) 2021, ACM, 2021, pp. 27–32.
Timing Optimization for Virtual FPGA Configurations
L.M. Witschen, T. Wiersema, M. Raeisi Nafchi, A. Bockhorn, M. Platzner, in: F. Hannig, S. Derrien, P. Diniz, D. Chillet (Eds.), Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21), Springer Lecture Notes in Computer Science, n.d.
Immersive augmented reality system for the training of pattern classification control with a myoelectric prosthesis
A. Boschmann, D. Neuhaus, S. Vogt, C. Kaltschmidt, M. Platzner, S. Dosen, Journal of NeuroEngineering and Rehabilitation 18 (2021).
Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs
A. Rodriguez, A. Otero, M. Platzner, E. De la Torre, IEEE Transactions on Computers (2021) 1–1.
Design of Distributed Reconfigurable Robotics Systems with ReconROS
C. Lienen, M. Platzner, ArXiv:2107.07208 (2021).
An Experimental Comparison of Explore/Exploit Strategies for the Learning Classifier System XCS
T. Hansmeier, M. Platzner, in: GECCO ’21: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Association for Computing Machinery (ACM), New York, NY, United States, 2021, pp. 1639–1647.
Software/Hardware Co-Verification for Custom Instruction Set Processors
M.-C. Jakobs, F. Pauck, M. Platzner, H. Wehrheim, T. Wiersema, IEEE Access (2021).
Malicious Routing: Circumventing Bitstream-level Verification for FPGAs
Q.A. Ahmed, T. Wiersema, M. Platzner, in: 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2021 Design, Automation and Test in Europe Conference (DATE), Alpexpo | Grenoble, France, 2021.
FLight: FPGA Acceleration of Lightweight DNN Model Inference in Industrial Analytics
H. Ghasemzadeh Mohammadi, F. Jentzsch, M. Kuschel, R. Arshad, S. Rautmare, S. Manjunatha, M. Platzner, A. Boschmann, D. Schollbach, in: Machine Learning and Principles and Practice of Knowledge Discovery in Databases, Springer, 2021.
Optimal and Greedy Heuristic Approaches for Scheduling and Mapping of Hardware Tasks to Reconfigurable Computing Devices
Z. Guetttatfi, P. Kaufmann, M. Platzner, in: Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC), 2020.
Adaptable Realization of Industrial Analytics Functions on Edge-Devices using Reconfigurable Architectures
C.P. Gatica, M. Platzner, in: Machine Learning for Cyber Physical Systems (ML4CPS 2017), Berlin, Heidelberg, 2020.
Proof-carrying Approximate Circuits
L.M. Witschen, T. Wiersema, M. Platzner, IEEE Transactions On Very Large Scale Integration Systems 28 (2020) 2084–2088.
Evolution of Application-Specific Cache Mappings
N. Ho, P. Kaufmann, M. Platzner, International Journal of Hybrid Intelligent Systems (2020).
Search Space Characterization for AxC Synthesis
L.M. Witschen, T. Wiersema, M. Platzner, Fifth Workshop on Approximate Computing (AxC 2020) (n.d.).
ReconROS: Flexible Hardware Acceleration for ROS2 Applications
C. Lienen, M. Platzner, B. Rinner, in: Proceedings of the 2020 International Conference on Field-Programmable Technology (FPT), 2020.
An Adaption Mechanism for the Error Threshold of XCSF
T. Hansmeier, P. Kaufmann, M. Platzner, in: GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Association for Computing Machinery (ACM), New York, NY, United States, 2020, pp. 1756–1764.
Dynamic Reliability Management for FPGA-Based Systems
J. Anwer, S. Meisner, M. Platzner, International Journal of Reconfigurable Computing (2020) 1–19.
Self-aware Cyber-Physical Systems
K. Bellman, N. Dutt, L. Esterle, A. Herkersdorf, A. Jantsch, C. Landauer, P. R. Lewis, M. Platzner, N. TaheriNejad, K. Tammemäe, ACM Transactions on Cyber-Physical Systems Accepted for Publication (2020) 1–24.
A Hybrid Synthesis Methodology for Approximate Circuits
M. Awais, H. Ghasemzadeh Mohammadi, M. Platzner, in: Proceedings of the 30th ACM Great Lakes Symposium on VLSI (GLSVLSI) 2020, ACM, 2020, pp. 421–426.
Enabling XCSF to Cope with Dynamic Environments via an Adaptive Error Threshold
T. Hansmeier, P. Kaufmann, M. Platzner, in: GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Association for Computing Machinery (ACM), New York, NY, United States, 2020, pp. 125–126.
MigHEFT: DAG-based Scheduling of Migratable Tasks on Heterogeneous Compute Nodes
A. Lösch, M. Platzner, in: 2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2020.
DeepWind: An Accurate Wind Turbine Condition Monitoring Framework via Deep Learning on Embedded Platforms
H. Ghasemzadeh Mohammadi, R. Arshad, S. Rautmare, S. Manjunatha, M. Kuschel, F.P. Jentzsch, M. Platzner, A. Boschmann, D. Schollbach, in: 2020 25th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA), 2020.
CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation
L.M. Witschen, T. Wiersema, H. Ghasemzadeh Mohammadi, M. Awais, M. Platzner, Microelectronics Reliability 99 (2019) 277–290.
Jump Search: A Fast Technique for the Synthesis of Approximate Circuits
L.M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, M. Platzner, Fourth Workshop on Approximate Computing (AxC 2019) (n.d.).
Jump Search: A Fast Technique for the Synthesis of Approximate Circuits
L.M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, M. Platzner, in: Proceedings of the 2019 on Great Lakes Symposium on VLSI - GLSVLSI ’19, ACM, New York, NY, USA, 2019.
Zynq-based acceleration of robust high density myoelectric signal processing
A. Boschmann, A. Agne, G. Thombansen, L.M. Witschen, F. Kraus, M. Platzner, Journal of Parallel and Distributed Computing 123 (2019) 77–89.
An Accelerator for Resolution Proof Checking based on FPGA and Hybrid Memory Cube Technology
T. Hansmeier, M. Platzner, M.J.H. Pantho, D. Andrews, Journal of Signal Processing Systems 91 (2019) 1259–1272.
Optimization of Application-specific L1 Cache Translation Functions of the LEON3 Processor
N. Ho, P. Kaufmann, M. Platzner, in: World Congress on Nature and Biologically Inspired Computing (NaBIC), Springer, 2019.
An Approach for Mapping Periodic Real-Time Tasks to Reconfigurable Hardware
Z. Guettatfi, M. Platzner, O. Kermia, A. Khouas, in: 2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), IEEE, 2019.
Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan
Q.A. Ahmed, T. Wiersema, M. Platzner, in: C. Hochberger, B. Nelson, A. Koch, R. Woods, P. Diniz (Eds.), Applied Reconfigurable Computing, Springer International Publishing, Cham, 2019, pp. 127–136.
Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes
A. Lösch, A. Wiens, M. Platzner, in: Proceedings of the International Conference on Architecture of Computing Systems (ARCS), Springer International Publishing, Cham, 2018, pp. 73–84.
An FPGA/HMC-Based Accelerator for Resolution Proof Checking
T. Hansmeier, M. Platzner, D. Andrews, in: ARC 2018: Applied Reconfigurable Computing. Architectures, Tools, and Applications, Springer International Publishing, 2018, pp. 153–165.
CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation
L.M. Witschen, T. Wiersema, H. Ghasemzadeh Mohammadi, M. Awais, M. Platzner, Third Workshop on Approximate Computing (AxC 2018) (n.d.).
Making the Case for Proof-carrying Approximate Circuits
L.M. Witschen, T. Wiersema, M. Platzner, 4th Workshop On Approximate Computing (WAPCO 2018) (2018).
A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes
A. Lösch, M. Platzner, in: 2018 IEEE 29th International Conference on Application-Specific Systems, Architectures and Processors (ASAP), IEEE, 2018.
An MCTS-based Framework for Synthesis of Approximate Circuits
M. Awais, H. Ghasemzadeh Mohammadi, M. Platzner, in: 26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2018, pp. 219–224.
R-Codesign: Codesign Methodology for Real-Time Reconfigurable Embedded Systems Under Energy Constraints
I. Ghribi, R.B. Abdallah, M. Khalgui, Z. Li, K. Alnowibet, M. Platzner, IEEE Access (2018) 14078–14092.
reMinMin: A Novel Static Energy-Centric List Scheduling Approach Based on Real Measurements
A. Lösch, M. Platzner, in: Proceedings of the 28th Annual IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP), 2017.
Proof-Carrying Hardware via Inductive Invariants
T. Isenberg, M. Platzner, H. Wehrheim, T. Wiersema, ACM Transactions on Design Automation of Electronic Systems (2017) 61:1--61:23.
The First 25 Years of the FPL Conference – Significant Papers
P. H.W. Leong, H. Amano, J. Anderson, K. Bertels, J. M.P. Cardoso, O. Diessel, G. Gogniat, M. Hutton, J. Lee, W. Luk, P. Lysaght, M. Platzner, V. K. Prasanna, T. Rissa, C. Silvano, H. So, Y. Wang, ACM Transactions on Reconfigurable Technology and Systems (2017).
Innovation in Reconfigurable Computing Fabrics: from Devices to Architectures (guest editorial)
R. F. DeMara, M. Platzner, M. Ottavi, IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing (2017).
Evaluating fault-tolerance of redundant FPGA structures using Boolean difference calculus
J. Anwer, M. Platzner, Microprocessors and Microsystems (2017) 160–172.
A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller
A. Boschmann, G. Thombansen, L.M. Witschen, A. Wiens, M. Platzner, in: Design, Automation and Test in Europe (DATE), 2017.
Accurate Private/Shared Classification of Memory Accesses: a Run-time Analysis System for the LEON3 Multi-core Processor
N. Ho, I.I. Ashraf, P. Kaufmann, M. Platzner, in: Proc. Design, Automation and Test in Europe Conf. (DATE), 2017.
Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor
N. Ho, P. Kaufmann, M. Platzner, in: 2017 International Conference on Field Programmable Technology (ICFPT), 2017, pp. 215–218.
Evaluation Methodology for Complex Non-deterministic Functions: A Case Study in Metaheuristic Optimization of Caches
P. Kaufmann, N. Ho, M. Platzner, in: Adaptive Hardware and Systems (AHS), IEEE, 2017.
Computational self-awareness as design approach for visual sensor nodes
Z. Guettatfi, P. Hübner, M. Platzner, B. Rinner, in: 12th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC), 2017, pp. 1–8.
I-Codesign: A Codesign Methodology for Reconfigurable Embedded Systems
I. Ghribi, R.B. Abdallah, M. Khalgui, M. Platzner, in: Communications in Computer and Information Science, Springer , Cham, 2017.
An Architecture and Design Tool Flow for Embedding a Virtual FPGA into a Reconfigurable System-on-Chip
T. Wiersema, A. Bockhorn, M. Platzner, Computers & Electrical Engineering (2016) 112--122.
FPGA-based acceleration of high density myoelectric signal processing
A. Boschmann, A. Agne, L. Witschen, G. Thombansen, F. Kraus, M. Platzner, in: 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2016.
Boolean Difference Based Reliability Evaluation of Fault Tolerant Circuit Structures on FPGAs
J. Anwer, M. Platzner, in: Euromicro Conference on Digital System Design (DSD), 2016.
Adaptive playouts for online learning of policies during Monte Carlo Tree Search
T. Graf, M. Platzner, Journal Theoretical Computer Science 644 (2016) 53–62.
Thread Shadowing: On the Effectiveness of Error Detection at the Hardware Thread Level
S. Meisner, M. Platzner, in: Reconfigurable Computing and FPGAs (ReConFig), 2016 International Conference On, 2016, pp. 1–8.
RCo-Design: New Visual Environment for Reconfigurable Embedded Systems
I. Ghribi, R. Ben Abdallah, M. Khalgui, M. Platzner, in: Proceedings of the 30th European Simulation and Modelling Conference (ESM), 2016.
New Co-design Methodology for Real-time Embedded Systems
I. Ghribi, R. Ben Abdallah, M. Khalgui, M. Platzner, in: Proceedings of the 11th International Conference on Software Engineering and Applications (ICSOFT-EA), 2016, pp. 185–195.
Self-aware Computing Systems: An Engineering Approach
P.R. Lewis, M. Platzner, B. Rinner, J. Tørresen, X. Yao, eds., Self-Aware Computing Systems: An Engineering Approach, Springer, Cham, 2016.
FPGA-based acceleration of high density myoelectric signal processing
A. Boschmann, A. Agne, L.M. Witschen, G. Thombansen, F. Kraus, M. Platzner, in: 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2016.
Using Deep Convolutional Neural Networks in Monte Carlo Tree Search
T. Graf, M. Platzner, in: Computer and Games, 2016.
Monte-Carlo Simulation Balancing Revisited
T. Graf, M. Platzner, in: IEEE Computational Intelligence and Games, 2016.
Verifying Worst-Case Completion Times for Reconfigurable Hardware Modules using Proof-Carrying Hardware
T. Wiersema, M. Platzner, in: Proceedings of the 11th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC 2016), 2016, pp. 1--8.
ReconOS
A. Agne, M. Platzner, C. Plessl, M. Happe, E. Lübbers, in: D. Koch, F. Hannig, D. Ziener (Eds.), FPGAs for Software Programmers, Springer International Publishing, Cham, 2016, pp. 227–244.
Self-aware Compute Nodes
A. Agne, M. Happe, A. Lösch, C. Plessl, M. Platzner, in: Self-Aware Computing Systems, Springer International Publishing, Cham, 2016, pp. 145–165.
Performance-centric scheduling with task migration for a heterogeneous compute node in the data center
A. Lösch, T. Beisel, T. Kenter, C. Plessl, M. Platzner, in: Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), EDA Consortium / IEEE, 2016, pp. 912–917.
On-The-Fly Verification of Reconfigurable Image Processing Modules based on a Proof-Carrying Hardware Approach
T. Wiersema, S. Wu, M. Platzner, in: Proceedings of the International Symposium in Reconfigurable Computing (ARC), 2015, pp. 365--372.
Microarchitectural optimization by means of reconfigurable and evolvable cache mappings
N. Ho, A.F. Ahmed, P. Kaufmann, M. Platzner, in: Proc. NASA/ESA Conf. Adaptive Hardware and Systems (AHS), 2015, pp. 1–7.
Comparison of thread signatures for error detection in hybrid multi-cores
S. Meisner, M. Platzner, in: Field Programmable Technology (FPT), 2015 International Conference On, 2015, pp. 212–215.
Significant papers from the first 25 years of the FPL conference
P. H.W. Leong, H. Amano, J. Anderson, K. Bertels, J. M.P. Cardoso, O. Diessel, G. Gogniat, M. Hutton, J. Lee, W. Luk, P. Lysaght, M. Platzner, V. K. Prasanna, T. Rissa, C. Silvano, H. So, Y. Wang, in: Proceedings of the 25th International Conference on Field Programmable Logic and Applications (FPL), Imperial College, 2015, pp. 1–3.
New Codesign Solutions for Modelling and Partitioning of Probabilistic Reconfigurable Embedded Software
I. Ghribi, R. Ben Abdallah, M. Khalgui, M. Platzner, in: Proceedings of the 29th European Simulation and Modelling Conference (ESM), 2015.
Adaptive Playouts in Monte-Carlo Tree Search with Policy-Gradient Reinforcement Learning
T. Graf, M. Platzner, in: Advances in Computer Games: 14th International Conference, ACG 2015, Leiden, The Netherlands, July 1-3, 2015, Revised Selected Papers, Springer International Publishing, 2015, pp. 1–11.
Aktuelles Schlagwort: Approximate Computing
C. Plessl, M. Platzner, P.J. Schreier, Informatik Spektrum (2015) 396–399.
Thread Shadowing: Using Dynamic Redundancy on Hybrid Multi-cores for Error Detection
S. Meisner, M. Platzner, in: D. Goehringer, M. Santambrogio, J.P. Cardoso, K. Bertels (Eds.), Proceedings of the 10th International Symposium on Applied Reconfigurable Computing (ARC), Springer, 2014, pp. 283–290.
On Semeai Detection in Monte-Carlo Go
T. Graf, L. Schaefers, M. Platzner, in: Proc. Conf. on Computers and Games (CG), Springer, Switzerland, 2014, pp. 14–25.
Memory Security in Reconfigurable Computers: Combining Formal Verification with Monitoring
T. Wiersema, S. Drzevitzky, M. Platzner, in: Proceedings of the International Conference on Field-Programmable Technology (FPT), 2014, pp. 167–174.
Integrating Software and Hardware Verification
M.-C. Jakobs, M. Platzner, T. Wiersema, H. Wehrheim, in: E. Albert, E. Sekerinski (Eds.), Proceedings of the 11th International Conference on Integrated Formal Methods (IFM), 2014, pp. 307–322.
Embedding FPGA Overlays into Configurable Systems-on-Chip: ReconOS meets ZUMA
T. Wiersema, A. Bockhorn, M. Platzner, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2014, pp. 1–6.
A Novel Technique and its Application to Computer Go
L. Schaefers, M. Platzner, IEEE Transactions on Computational Intelligence and AI in Games 6 (2014) 361–374.
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