Abgeschlossene Arbeiten
Exploring Custom FPGA Accelerators for DNN-based RF Fingerprinting
L.-S. Henke, Exploring Custom FPGA Accelerators for DNN-Based RF Fingerprinting, 2024.
Controlling I/O Devices from Hardware-Mapped ReconROS Nodes
M. Hartinger, Controlling I/O Devices from Hardware-Mapped ReconROS Nodes, Paderborn University, 2024.
Efficient Neural Network Inference for Velocity Estimation in Athletic Relay Races on a Microcontroller
D.B. Anantha Rao, Efficient Neural Network Inference for Velocity Estimation in Athletic Relay Races on a Microcontroller, Paderborn University, 2023.
An Evaluation of XCS on the OpenAI Gym
F. Mehlich, An Evaluation of XCS on the OpenAI Gym, Paderborn University, Paderborn, 2023.
A Comparison of Algorithms for the Generation of Layouts based on Reconfigurable Slots on FPGAs
Y. Tadakamalla, A Comparison of Algorithms for the Generation of Layouts Based on Reconfigurable Slots on FPGAs, Paderborn University, 2023.
Design and Realization of Optimized Intra-FPGA ROS 2 Communication
S.H. Middeke, Design and Realization of Optimized Intra-FPGA ROS 2 Communication, Paderborn University, 2023.
A Hardware/Software Co-designed ORB-SLAM2 Algorithm for FPGA
S. Thiele, A Hardware/Software Co-Designed ORB-SLAM2 Algorithm for FPGA, Paderborn University, 2023.
Implementation and Evaluation of a ReconROS-based Obstacle Avoidance Architecture for Autonomous Robots
A. Abooof, Implementation and Evaluation of a ReconROS-Based Obstacle Avoidance Architecture for Autonomous Robots, Paderborn University, 2023.
Multithreaded Software/Hardware Programming with ReconOS/Zephyr on a RISC-V-based System-on-Chip
A.P. Rao, Multithreaded Software/Hardware Programming with ReconOS/Zephyr on a RISC-V-Based System-on-Chip, Paderborn University, 2023.
Effizienzanalyse leichtgewichtiger Neuronaler Netze für FPGA-basierte Modulationsklassifikation
F. Simon-Mertens, Effizienzanalyse leichtgewichtiger Neuronaler Netze für FPGA-basierte Modulationsklassifikation, Paderborn University, 2023.
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